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Simucad Targets Interconnect Parasitic Modeling Challenges with Multi-Core Optimized Software products
美国 加州圣克拉拉县, 2006年3月30日
Simucad Design Automation Inc., a leading provider of electronic design automation (EDA) software tools, announced today the availability of a multi-core optimized family of 3D TCAD-based interconnect parasitic modeling tools. These state-of-the-art productsare optimized for the specific requirements for characterizing the capacitance, resistance, and/or inductance of multi-level interconnect systems, inductor libraries, and complete circuits in the form of cells and cores.
"EXACT Interconnect Parasitic Characterization delivers accurate interconnect models for nanometer semiconductor processes and generates layout parameter extraction (LPE) rule files for Calibre™", said Lou Morales, president of iSine Inc. "The extracted results met our requirements for accuracy".
"CLEVER Physics-Based Parasitic Extractor uses 3D field solvers and 3D TCAD algorithms to directly convert the mask data of a cell, with relevant process information, into a SPICE netlist back annotated with the most accurate interconnect capacitance and resistance parasitics", said Dennis Young, design service manager at Ramtron. "We accurately modeled the parasitics for our ferro-electric memory cells".
Simucad Multi-Core Optimized 3D TCAD-Based Interconnect Parasitic Modeling
Based on almost twenty years of TCAD development experience, Simucad is delivering interconnect modeling solutions for 90nm, 65nm and 45nm optimized to run on multi-core computers.
"Accuracy is the most critical aspect for parasitic extraction", said Dr. Ivan Pesic, CEO of Simucad. "We build realistic 3D structures and apply full 3D solvers to extract the parasitics from the actual silicon geometries that are on the wafer—not what is drawn in GDSII".
Compute-intensive 3D parasitic extraction can now be completed in a reasonable time using parallelized software optimized to run on inexpensive multi-core computers. Simucad has partitioned the basic extraction algorithms to achieve maximum parallelization to take full advantage of multi-core architectures under the Linux, Solaris, and Windows operating systems.
This technology-independent family of parasitic extractors share a common GUI interface for ease of use and common models and technology files for easy setup of a new technology process. A powerful scripting language interface enables automation of batch operations and output file customization to easily fit each of these tools into customer-specific design flows.
媒体联系人：
Dr. Ivan Pesic
+1 408-567-1000
中国市场销售 请联系：
矽谷科技公司
上海市延安中路1135弄
静安花园商务楼5号308室
邮编200040
电话：+86-21 51780366
传真：+86-21 51079658
电邮：cnsales@silvaco.com
网站：http://www.silvaco.com.cn
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