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疑难解答/FAQ

Q1	As sheet resistance is a function of W and L of the transistor, then how does DECKBUILD extract the sheet resistance (in ohm/square) if 2D simulation is performed?

Q2	When performing process simulation of AlGaAs/GaAs LED, I tried to perform diffusion of Boron. But, the impurity only diffuses through the first GaAs layer, it does not diffuse into the second AlGaAs and third GaAs layer as shown below. Do you have any idea how to solve this problem?

Q3	How to extract the effective channel length of a MOS structure?

Q4	Can I place the implant tables in one directory and run the process input deck file at another directory?

Q5	Is the minimum thickness 20A that we can grow?

Q6	I noticed there are many parameters such as MUN, MUP, NC, NV, TAUN, TAUP in the appendix B. But I don’t know what is the physical meaning？

Q7	When I simulate a structure which have many gates, it will take much time to write the input deck with “etch” statements. And I must be careful with the x and y coordinates. Are there any easily methods?

Q8	I've been trying to simulate a trench gate structure, but I'm getting a real odd profile once I do the oxidation post trench etch. Could someone in your team help me figure out?

Q9	我想模拟金属淀积过程中的void的形成过程，如何进行？

Q10	May I know how to extract the y location of the silicon surface after oxidation process as shown below?

Q1	As sheet resistance is a function of W and L of the transistor, then how does DECKBUILD extract the sheet resistance (in ohm/square) if 2D simulation is performed?
A1	The sheet resistance (Rs) of a layer with resisitivity, P, and thickness, t, is given by their ratio: Rs = P / t In ATHENA, it is this sheet resistance, Rs that is being extracted. While strictly speaking the units of the sheet resistance is Ohms, one refers to it as being in Ohms per square. This nomenclature comes in handy when the resistance of a rectangular piece of material with length, L, and width W must be obtained. It equals the product of the sheet resistance and the number of squares or: R = Rs * (W/L) where the number of squares equals the length divided by the width. Therefore, once the sheet resistance has been extracted by DECKBUILD, you can compute R (in ohm/square) easily.
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Q2	When performing process simulation of AlGaAs/GaAs LED, I tried to perform diffusion of Boron. But, the impurity only diffuses through the first GaAs layer, it does not diffuse into the second AlGaAs and third GaAs layer as shown below. Do you have any idea how to solve this problem?
A2	This is because the segregation and transport parameters at the interface between AlGaAs and GaAs are not defined. Therefore, the dopant only confine within the top GaAs region. You need to use the IMPURITY statement to define these parameters. An example of how you can define these parameters are as follow: IMPURITY I.BORON ALGAAS /GAAS SEG.0=1 TRN.0=1.66E-7 IMPURITY I.BORON GAAS /ALGAAS SEG.0=1 TRN.0=1.66E-7 After defining the IMPURITY statement, the Net Doping profile of the LED structure is as shown below.
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Q3	How to extract the effective channel length of a MOS structure?
A3	Take the MOS example as shown below:
	To extract the channel length, use the following EXTRACT statement as follows: extract name="junc_source" xj silicon mat.occno=1 y.val=0.22 junc.occno=1 extract name="junc_drain" xj silicon mat.occno=1 y.val=0.22 junc.occno=2 extract name="Channel Length" $"junc_drain"-$"junc_source"
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Q4	Can I place the implant tables in one directory and run the process input deck file at another directory?
A4	You can place your implant tables in ANY directory. But you must specify the full path of the directory. For example, the implant table with file name "imptable1" is kept at /silvaco/work/implant/imptable1, then the command for standard format table is: moments usr_std_tab user_table=/silvaco/work/implant/imptable1 where "/silvaco/work/implant/" directory is where all implant tables placed, "imptable1" is your implant table file, and "usr_std_tab" specifies the moment file in standard format.
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Q5	Is the minimum thickness 20A that we can grow?
A5	No. The oxide thickness grow greatly depends on the various diffusion parameters such as the time and temperature. For oxidation, you can set many of the oxidation coefficients via the OXIDE statement. The default thickness is set to 20A. You can set a value of 10A using: OXIDE INITIAL=0.001
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Q6	I noticed there are many parameters such as MUN, MUP, NC, NV, TAUN, TAUP in the appendix B. But I don’t know what is the physical meaning？
A6	These parameters are defined in the statements related. For your case, MUN= low field mobility for electron, MUP=low field mobility for hole, NC=conduction band density of states, NV=valence band density of states,TAUN=life time of electron in a trap or recombination,TAUP=life time of hole in a trap or recombination.
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Q7	When I simulate a structure which have many gates, it will take much time to write the input deck with “etch” statements. And I must be careful with the x and y coordinates. Are there any easily methods?
A7	Yes, you can use MaskViews. With this tool, you needn’t calculate the x and y coordinates. Maskviews is a layout editor, you can design your structre with it and it can generate the grid which needed by Athena. Here is the example: Step1: Define the layer You must define the needed layer with the menu “Define”->”Layers…”, in the popup window (figure 1), you need type the name of label and name. Also you need define the field to Dark or Clear. In this example, we will define two layers: active(dark) and poly(clear).
	Figure 1: Layer Definition
	Step 2: Design the structure Here you should draw the structure for different layer. See following picture.
	Step 3: define the grid The next step is to define the grid through menu "Define"->"Grid"->"X..." and "Y..." (Figure 3). Then will popup a window Figure 4) which you can type the vertical and horizontal dimension.
	Figure 3: Grid Definition
	Figure 4: Grid definition
	Step 4: Generate Cutline file Then we will write cutline through menu "Files"->"Write Cutline File". When you select this, you will be asked to draw the cutline in the window. (you can find the cutline is grayed line in Figure 5) And then you must type the file name. Here we use example.sec.
	Figure 5: Cutline Files
	Step 5: use cutline file in the input deck Now we should finish the final step. Here you should type the cutline file name:      go athena cutline=example.sec then before you want to use etch statement, just type "mask name=**", for example:      mask name="Poly"      etch poly dry thick=0.6 The simulator will automatic etching poly according to the mask. Yes, we needn’t type those statement such as:      etch poly start x=... y=...      etch cont x=... y=...      ....      etch done x=... y=... Here you needn’t carefully calculate the x and y coordinates which easily make mistakes. The full input deck is in the figure 6.
	Figure 6: Input deck
	After you run the simulation and draw the structure in TonyPlot, you will find the poly and active region are etched according to your design. Figure 7 is our example run.
	Figure 7: Simulation Result
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Q8	I've been trying to simulate a trench gate structure, but I'm getting a real odd profile once I do the oxidation post trench etch. Could someone in your team help me figure out? Below is my structure?
A8	The reason is because Improper meshing and etch rate parameters cause unsmooth sidewall and etching profile. We do recommend you adjust your meshing point, especially set more spacing at sharp corner edges. Below are refined meshing and its etching parameters. line x loc=0.00 spac=0.1 line x loc=0.2 spac=0.1 line x loc=0.5 spac=0.1 line x loc=0.72 spac=0.02 line x loc=0.9 spac=0.1 line x loc=1.0 spac=0.1 # line y location=0.0 spacing=0.02 line y location=1.48 spacing=0.02 line y location=2.0 spacing=0.1 line y location=3.0 spacing=0.1 line y location=4.0 spacing=0.1 line y location=5.0 spacing=0.1 # silicon trench etching rate.etch machine=rie silicon u.m rie isotropic=0.0 directional=0.6 etch machine=rie time=2.4 minutes
	After refined meshing and etch profile
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Q9	我想模拟金属淀积过程中的void的形成过程，如何进行？
A9	为了模拟void的形成过程，首先必须定义一个与你工艺符合的淀积机器，这可以通过语句“rate.depo”并选择“hemispheric”模型来完成。对于这个模型，还必须指定生长速率和入射角度，如下所示： rate.depo machine=aldepo aluminum a.m sigma.dep=0.5 hemisphe dep.rate=1000 angle1=60.00 angle2=-60.00 然后，第二步是在淀积金属（例如铝）的时候，要在语句“deposit”中加入选项“void”，也就是如下所示： deposit machine=aldepo time=$deposit-time minute divis=5 void 这里的变量deposit-time 是指淀积时间。 这样，void的形成过程就可以通过改变淀积时间来模拟了，如下面几幅图所示：
	图 1: 淀积3分钟，铝层的厚度为3000A
	图 2: 淀积4分钟，铝层的厚度为4000A
	图 3: 淀积5分钟，铝层的厚度为5000A, void形成
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Q10	May I know how to extract the y location of the silicon surface after oxidation process as shown below?
A10	Below is an example that I've created to show the extraction the y location of the silicon surface after oxidation assuming the thickness of Silicon is 1um before oxidation:
	go athena set thick_Si=1 # Non-Uniform Grid (0.6um x 1.0um) line x loc=0.00 spac=0.10 line x loc=0.2 spac=0.01 line x loc=0.6 spac=0.01 # line y loc=0.00 spac=0.008 line y loc=0.2 spac=0.01 line y loc=0.5 spac=0.05 line y loc=$thick_Si spac=0.15 # Initial Silicon Structure with <100> Orientation init silicon c.boron=1.0e14 orientation=100 two.d # Gate Oxidation diffus time=15 temp=930 dryo2 press=1 hcl.pc=3 # extract name="T1" min.bound material="Silicon" mat.occno=1 x.val=0.3 extract name="T2" max.bound material="Silicon" mat.occno=1 x.val=0.3 extract name="Si_yloc" $thick_Si - ($T2 - $T1)
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