Variation-Aware Design

Process variability at advanced technology nodes has become the key challenge for IC designers. A new generation of tools are required that provide efficient and reliable solutions for analog, RF, standard cells, IO and memory designers. A comprehensive suite of analysis tools that allow the designer to accurately address statistical process variations and to make the right design decision upfront is needed. The tools need to ensure that designers do not need to be expert statisticians to understand and optimize the impact of process variations on their design.

ICLys

ICLys ICLys is the next generation solution to variation-aware design challenges for analog, mixed-signal and RF designs. It proposes a complete suite of variation tools that allow the designer...

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CALys

CALys CALys is a unique tool that provides efficient and reliable solutions for standard cells statistical functional verification while preserving brute force quality.


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